A replacement of high-k process for CMOS transistor by atomic layer deposition
Jin‐Woo Han, Byung Joon Choi, J. Joshua Yang, Dong‐Il Moon, Yang‐Kyu Choi, R. Stanley Williams, Meyya Meyyappan
Abstract
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Jin‐Woo Han, Byung Joon Choi, J. Joshua Yang, Dong‐Il Moon, Yang‐Kyu Choi, R. Stanley Williams, Meyya Meyyappan
Abstract
Open-access reader
A replacement of high- k process was implemented on an independent double gate FinFET, following the ordinary gate-first process with minor modifications. The present scheme involves neither exotic materials nor unprecedented processing. After the source/drain process, the sacrificial gate oxide was selectively substituted with amorphous Ta 2 O 5 via conformal plasma enhanced atomic layer deposition. The present gate-first gate-dielectric-last scheme combines the advantages of the process and design simplicity of the gate-first approach and the control of the effective gate workfunction and the interfacial oxide of the gate-dielectric-last approach. Electrical characterization data and cross-sectional images are provided as evidence of the concept.
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A replacement of high- k process was implemented on an independent double gate FinFET, following the ordinary gate-first process with minor modifications. The present scheme involves neither exotic materials nor unprecedented processing. After the source/drain process, the sacrificial gate oxide was selectively substituted with amorphous Ta 2 O 5 via conformal plasma enhanced atomic layer deposition. The present gate-first gate-dielectric-last scheme combines the advantages of the process and design simplicity of the gate-first approach and the control of the effective gate workfunction and the interfacial oxide of the gate-dielectric-last approach. Electrical characterization data and cross-sectional images are provided as evidence of the concept.
Key concepts: Gate dielectric, High-κ dielectric, Gate oxide, Metal gate, Atomic layer deposition, Transistor, Optoelectronics, Time-dependent gate oxide breakdown