2003Unpublished venueRequires access

Design flow of robust routed power distribution for low power ASIC

Dae Woon Kang, Yong-Bin Kim

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Abstract

This paper deals with a detailed systematic methodology to design power and ground distribution networks in low power ASICs. A design flow for determining the width of each branch in the power and ground networks meeting the design requirements is presented, along with a design example, where the objective is to minimize the area of the power and ground networks for several given constraints such as IR drop and EM. This methodology was applied to a low power speech recognition ASIC design and was successfully verified.

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What this paper is about

This paper deals with a detailed systematic methodology to design power and ground distribution networks in low power ASICs. A design flow for determining the width of each branch in the power and ground networks meeting the design requirements is presented, along with a design example, where the objective is to minimize the area of the power and ground networks for several given constraints such as IR drop and EM. This methodology was applied to a low power speech recognition ASIC design and was successfully verified.

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Available abstract

This paper deals with a detailed systematic methodology to design power and ground distribution networks in low power ASICs. A design flow for determining the width of each branch in the power and ground networks meeting the design requirements is presented, along with a design example, where the objective is to minimize the area of the power and ground networks for several given constraints such as IR drop and EM. This methodology was applied to a low power speech recognition ASIC design and was successfully verified.

Key concepts: Application-specific integrated circuit, Design flow, Power (physics), Physical design, Integrated circuit design, Computer science, Electronic engineering, Power flow

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