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A High-Speed HBT Prescaler Based on the Divide-by-Two Topology

Hung‐Ju Wei, Chinchun Meng, YuWen Chang, Yi-Chen Lin, Guo‐Wei Huang

Open publisher page 3 citations

Abstract

This paper demonstrates the Divide-by-4/5 prescalers with merged AND gates in 2 mum GalnP/GaAs heterojunction bipolar transistor (HBT) and 0.35 mum SiGe HBT technologies. By biasing the HBT near the peak transit-time frequency (fr), the maximum operating frequency of a D-type flip-flop (D-FF) can be promoted. At the supply voltage of 5 V, the GalnP/GaAs prescaler operates from 30 MHz to 5.2 GHz, and the SiGe prescaler has the higher-speed performance of 1 GHz ~ 8 GHz at the cost of power consumption.

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What this paper is about

This paper demonstrates the Divide-by-4/5 prescalers with merged AND gates in 2 mum GalnP/GaAs heterojunction bipolar transistor (HBT) and 0.35 mum SiGe HBT technologies. By biasing the HBT near the peak transit-time frequency (fr), the maximum operating frequency of a D-type flip-flop (D-FF) can be promoted. At the supply voltage of 5 V, the GalnP/GaAs prescaler operates from 30 MHz to 5.2 GHz, and the SiGe prescaler has the higher-speed performance of 1 GHz ~ 8 GHz at the cost of power consumption.

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Available abstract

This paper demonstrates the Divide-by-4/5 prescalers with merged AND gates in 2 mum GalnP/GaAs heterojunction bipolar transistor (HBT) and 0.35 mum SiGe HBT technologies. By biasing the HBT near the peak transit-time frequency (fr), the maximum operating frequency of a D-type flip-flop (D-FF) can be promoted. At the supply voltage of 5 V, the GalnP/GaAs prescaler operates from 30 MHz to 5.2 GHz, and the SiGe prescaler has the higher-speed performance of 1 GHz ~ 8 GHz at the cost of power consumption.

Key concepts: Heterojunction bipolar transistor, Frequency divider, Electrical engineering, Voltage, Transistor, Optoelectronics, Materials science, Gallium arsenide

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