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2010•Unpublished venueRequires access

A 10MHz to 100MHz bandwidth scalable, fully differential current feedback amplifier

Nihit Bajaj, Bert Vermeire, Bertan Bakkaloğlu

Open publisher page 3 citations

Abstract

A technique for power-bandwidth scaling of a current feedback amplifier (CFA) is presented. By employing current gain, instead of the feedback resistance, to alter the closed-loop bandwidth of the CFA, the proposed approach is shown to provide 30% quiescent power savings for a bandwidth variation of 10MHz to 100MHz. Parasitic extracted simulations are performed in a 0.18μm CMOS process with a power supply of 3.3V and a load capacitance of 1.5pF. A closed-loop gain range of 0-20dB, slew rate of 200V/μs, settling time of 33ns and total harmonic distortion of 73dB is achieved at a quiescent power consumption range of 3mW to 4.4mW.

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What this paper is about

A technique for power-bandwidth scaling of a current feedback amplifier (CFA) is presented. By employing current gain, instead of the feedback resistance, to alter the closed-loop bandwidth of the CFA, the proposed approach is shown to provide 30% quiescent power savings for a bandwidth variation of 10MHz to 100MHz. Parasitic extracted simulations are performed in a 0.18μm CMOS process with a power supply of 3.3V and a load capacitance of 1.5pF. A closed-loop gain range of 0-20dB, slew rate of 200V/μs, settling time of 33ns and total harmonic distortion of 73dB is achieved at a quiescent power consumption range of 3mW to 4.4mW.

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Available abstract

A technique for power-bandwidth scaling of a current feedback amplifier (CFA) is presented. By employing current gain, instead of the feedback resistance, to alter the closed-loop bandwidth of the CFA, the proposed approach is shown to provide 30% quiescent power savings for a bandwidth variation of 10MHz to 100MHz. Parasitic extracted simulations are performed in a 0.18μm CMOS process with a power supply of 3.3V and a load capacitance of 1.5pF. A closed-loop gain range of 0-20dB, slew rate of 200V/μs, settling time of 33ns and total harmonic distortion of 73dB is achieved at a quiescent power consumption range of 3mW to 4.4mW.

Key concepts: Slew rate, Bandwidth (computing), Operational amplifier, Electronic engineering, Total harmonic distortion, Amplifier, Settling time, Computer science

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