Design of fully differential operational amplifier with low cost common feedback circuit
Lei Jian-min
Abstract
Lei Jian-min
Abstract
A fully differential operational amplifier(AMP)for pipelined ADC was designed.A simple common mode feedback(CMFB)structure by adjusting the feedback quantity and sharing the differential signal path was proposed to improve the loop gain.The auto-oscillation of the circuit was prevented by reducing the feedback coefficient,and the high design cost and high design difficulty caused by the application of the compensation capacitance were avoided.The amplifier contains a two-stage folded cascode architecture and is frequency compensated,and the output stage uses a push-pull class-AB structure.The amplifier uses the SMIC 0.35μm technology.The post-layout simulation results show that the open gain is up to 100dB,the unity gain bandwidth(UGB)is 359MHz with a 3pF load,the phase margin(PM)is 68°and the settling time is 12.3ns.All the specifications meet the design requirements of the ADC.This fully differential operational amplifier is appropriate to be used in the inter-stage gain circuit and the sample-hold circuit of high accuracy pipelined ADC.
A significance statement is not available in the OpenAlex record.
A contribution statement is not available in the OpenAlex record.
Method details are not available in the OpenAlex metadata.
Findings are not separately available in the OpenAlex metadata.
Limitations are not available in the OpenAlex metadata.
Application details are not available in the OpenAlex metadata.
A fully differential operational amplifier(AMP)for pipelined ADC was designed.A simple common mode feedback(CMFB)structure by adjusting the feedback quantity and sharing the differential signal path was proposed to improve the loop gain.The auto-oscillation of the circuit was prevented by reducing the feedback coefficient,and the high design cost and high design difficulty caused by the application of the compensation capacitance were avoided.The amplifier contains a two-stage folded cascode architecture and is frequency compensated,and the output stage uses a push-pull class-AB structure.The amplifier uses the SMIC 0.35μm technology.The post-layout simulation results show that the open gain is up to 100dB,the unity gain bandwidth(UGB)is 359MHz with a 3pF load,the phase margin(PM)is 68°and the settling time is 12.3ns.All the specifications meet the design requirements of the ADC.This fully differential operational amplifier is appropriate to be used in the inter-stage gain circuit and the sample-hold circuit of high accuracy pipelined ADC.
Key concepts: Phase margin, Fully differential amplifier, Open-loop gain, Operational amplifier, Operational transconductance amplifier, Direct-coupled amplifier, Differential amplifier, Current-feedback operational amplifier