Design and simulation of reusable IP CORDIC core for special-purpose processors

Coordinate rotation digital computer (CORDIC) is a well-known algorithm using simple adders and shifters to evaluate various elementary functions. A double rotation CORDIC algorithm with an efficient strategy to predict the rotation direction is proposed for a high-speed sine and cosine generator and complex multiplier. Simulation results show that the computation time can be improved by 37.2%, 42.67% and 46.04% for 16-bit, 32-bit and 64-bit operands, respectively. In addition, the overall power consumption per CORDIC arithmetic computation can be improved by 21.2% and 38.5% for 32-bit and 64-bit operands, respectively. Thus, the proposed double rotation CORDIC processor is suitable for high-speed applications.