1990•European Solid-State Circuits ConferenceRequires access

Power Dissipation Analysis of CMOS VLSI Circuits by means of Switch-Level Simulation

C.M. Huizer

Abstract

A method has been defined to analyze the power dissipation of CMOS VLSI circuits by means of switch-level simulation. Random vectors are used as stimuli to the circuit to ensure vector-independentness. The method has been implemented using an existing mixed-level simulator. Results are described for a range of circuits, including a 20,000 transistor one.

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Available abstract

Key concepts: Very-large-scale integration, Dissipation, CMOS, Electronic circuit, Electronic engineering, Computer science, Integrated injection logic, Transistor