A roadmap to low cost bumping for DCA, COF, CSP and BGA [flip chip]
E. Zakel, Thorsten Teutsch
Abstract
E. Zakel, Thorsten Teutsch
Abstract
Flip chip (FC) technology is gaining an increased level of importance for a variety of applications based on flip chip on board or flip chip in package. The first driving force for the introduction of this technology was the need to achieve increased speed and performance along with higher I/O count. A breakthrough, however, will be the use of flip chip due to cost reduction. For this aim, it is essential to use low cost bumping techniques in combination with an assembly method compatible with existing SMT processes. The FC techniques presented in this paper are all based on an electroless Ni/Au bumping process which has been developed by TUB/IZM and implemented into production by Pac Tech. This paper shows a roadmap based on electroless nickel/gold bumping for all flip chip interconnection technologies used in industry at present. Additionally, the roadmap to future developments in semiconductor industry based on 300 mm wafers and the use of new pad metallisations such as copper is shown. The compatibility of electroless nickel bumping in particular with these new technologies to be implemented in wafer manufacturing within the next millenium shows that this key technology offers a roadmap to flip chip technology not only for the products and wafer technologies in use at present, but also for next generation wafer technologies.
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Flip chip (FC) technology is gaining an increased level of importance for a variety of applications based on flip chip on board or flip chip in package. The first driving force for the introduction of this technology was the need to achieve increased speed and performance along with higher I/O count. A breakthrough, however, will be the use of flip chip due to cost reduction. For this aim, it is essential to use low cost bumping techniques in combination with an assembly method compatible with existing SMT processes. The FC techniques presented in this paper are all based on an electroless Ni/Au bumping process which has been developed by TUB/IZM and implemented into production by Pac Tech. This paper shows a roadmap based on electroless nickel/gold bumping for all flip chip interconnection technologies used in industry at present. Additionally, the roadmap to future developments in semiconductor industry based on 300 mm wafers and the use of new pad metallisations such as copper is shown. The compatibility of electroless nickel bumping in particular with these new technologies to be implemented in wafer manufacturing within the next millenium shows that this key technology offers a roadmap to flip chip technology not only for the products and wafer technologies in use at present, but also for next generation wafer technologies.
Key concepts: Bumping, Flip chip, Ball grid array, Wafer, Interconnection, Thermal copper pillar bump, Chip-scale package, Chip