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2003•Unpublished venueRequires access

Configurable EEPROMS for ASICS

B. J. Carney, Elroy Lucero, R. Mendel, Heinz Reiter

Open publisher page 5 citations

Abstract

A 5-V only, variable-size EEPROM (electrically erasable programmable read-only memory) is discussed. A test chip providing 256*8-bit memory is described, as well as the methodology used to implement it. Certain special nonvolatile memory circuits are investigated. Application areas, manufacturing issues, and testing techniques are also considered.>

About this research paper

What this paper is about

A 5-V only, variable-size EEPROM (electrically erasable programmable read-only memory) is discussed. A test chip providing 256*8-bit memory is described, as well as the methodology used to implement it. Certain special nonvolatile memory circuits are investigated. Application areas, manufacturing issues, and testing techniques are also considered.>

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OpenAlex reports 5 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Method / approach

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Available abstract

A 5-V only, variable-size EEPROM (electrically erasable programmable read-only memory) is discussed. A test chip providing 256*8-bit memory is described, as well as the methodology used to implement it. Certain special nonvolatile memory circuits are investigated. Application areas, manufacturing issues, and testing techniques are also considered.>

Key concepts: EEPROM, EPROM, Non-volatile memory, Application-specific integrated circuit, Computer science, Computer hardware, Non-volatile random-access memory, Embedded system

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