Tao Peng
Abstract
Device mismatch in static RAM (SRAM) has a strong impact on the speed yield. A rigorous statistical model of the mismatch settings for the simulations of the sense amplifier (SA) in SRAM is presented. The model comprehends the memory density, the circuit architecture, and the mismatch delay sensitivity.
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Device mismatch in static RAM (SRAM) has a strong impact on the speed yield. A rigorous statistical model of the mismatch settings for the simulations of the sense amplifier (SA) in SRAM is presented. The model comprehends the memory density, the circuit architecture, and the mismatch delay sensitivity.
Key concepts: Static random-access memory, Sense amplifier, Sense (electronics), Amplifier, Computer science, Sensitivity (control systems), Electronic engineering, Semiconductor memory