SRAM sense amplifier offset cancellation using BTI stress
Peter Beshay, Jonathan F. Bolus, Travis N. Blalock, Vikas Chandra, Benton Highsmith Calhoun
Abstract
Peter Beshay, Jonathan F. Bolus, Travis N. Blalock, Vikas Chandra, Benton Highsmith Calhoun
Abstract
Device variability in modern processes has become a major concern in SRAM design leading to degradation of both performance and yield. Variation induced offset in the sense amplifiers requires a larger bitline differential, which slows down SRAM access times. In this paper, we propose a post fabrication technique that takes advantage of the typically detrimental bias temperature instability (BTI) aging effect to improve SRAM sense amplifier offset.
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Device variability in modern processes has become a major concern in SRAM design leading to degradation of both performance and yield. Variation induced offset in the sense amplifiers requires a larger bitline differential, which slows down SRAM access times. In this paper, we propose a post fabrication technique that takes advantage of the typically detrimental bias temperature instability (BTI) aging effect to improve SRAM sense amplifier offset.
Key concepts: Sense amplifier, Static random-access memory, Offset (computer science), Random access memory, Sense (electronics), Amplifier, Electronic engineering, Computer science