2014Asia-Pacific Microwave ConferenceRequires access

An integrated Q-band 6-bit digital attenuator with low insertion loss

Li Zhao, Wenfeng Liang, Xiaojie Xu, Xin Jiang, Jianyi Zhou

Open publisher page 3 citations

Abstract

This paper presents a 40–50 GHz low insertion loss 6-bit digital step attenuators. The attenuator has a maximum attenuation range of 31.5 dB with 0.5 dB steps (64 states). It is the first full 6-bit digital attenuator reported over the frequency range of 40–50 GHz to the best of the authors' knowledge. An accurate field effect transistor's (FET's) switch model is developed, which is crucial for the design of attenuator at such high frequency. To reduce the insertion loss, the series transistors of switched T attenuator are removed in the least significant bits (LSBs). The attenuator is fabricated using a 0.15 µm GaAs pHEMT process. The measured insertion loss is 6.5 dB at 40 GHz and 7 dB at 44 GHz respectively. This attenuator exhibits a root-mean-square (RMS) amplitude error of 0.5 dB at 46 GHz, and with the input and output return loss below −10 dB at 40–50 GHz. The core chip size, excluding pads, is 1.8 × 1.05 mm2.

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What this paper is about

This paper presents a 40–50 GHz low insertion loss 6-bit digital step attenuators. The attenuator has a maximum attenuation range of 31.5 dB with 0.5 dB steps (64 states). It is the first full 6-bit digital attenuator reported over the frequency range of 40–50 GHz to the best of the authors' knowledge. An accurate field effect transistor's (FET's) switch model is developed, which is crucial for the design of attenuator at such high frequency. To reduce the insertion loss, the series transistors of switched T attenuator are removed in the least significant bits (LSBs). The attenuator is fabricated using a 0.15 µm GaAs pHEMT process. The measured insertion loss is 6.5 dB at 40 GHz and 7 dB at 44 GHz respectively. This attenuator exhibits a root-mean-square (RMS) amplitude error of 0.5 dB at 46 GHz, and with the input and output return loss below −10 dB at 40–50 GHz. The core chip size, excluding pads, is 1.8 × 1.05 mm2.

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Available abstract

This paper presents a 40–50 GHz low insertion loss 6-bit digital step attenuators. The attenuator has a maximum attenuation range of 31.5 dB with 0.5 dB steps (64 states). It is the first full 6-bit digital attenuator reported over the frequency range of 40–50 GHz to the best of the authors' knowledge. An accurate field effect transistor's (FET's) switch model is developed, which is crucial for the design of attenuator at such high frequency. To reduce the insertion loss, the series transistors of switched T attenuator are removed in the least significant bits (LSBs). The attenuator is fabricated using a 0.15 µm GaAs pHEMT process. The measured insertion loss is 6.5 dB at 40 GHz and 7 dB at 44 GHz respectively. This attenuator exhibits a root-mean-square (RMS) amplitude error of 0.5 dB at 46 GHz, and with the input and output return loss below −10 dB at 40–50 GHz. The core chip size, excluding pads, is 1.8 × 1.05 mm2.

Key concepts: Attenuator (electronics), Insertion loss, Return loss, Materials science, Monolithic microwave integrated circuit, Attenuation, Optical attenuator, Optoelectronics

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