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2021•2021 IEEE 4th International Conference on Electronics Technology (ICET)Requires access

A DC-6 GHz 7-Bit Digital Attenuator with Low Insertion Loss

Haohao Xiao, Jianquan Hu, Kaixue Ma

Open publisher page 7 citations

Abstract

This paper presents a dc to 6-GHz 7-bit digital attenuator with low insertion loss fabricated using E/D-mode GaAs pseudomorphic high electron-mobility transistor (pHEMT) process. By using the simplified T-attenuator to reduce the number of switch transistors, the designed digital attenuator achieves low insertion loss. Measurement results indicate that the designed digital attenuator achieves a 31.75-dB attenuation range with 0.25-dB resolution, smaller than 2.3-dB insertion loss, and less than 0.4-dB RMS attenuation error with better than -10-dB input/output return loss in the frequency range from dc to 6-GHz. Meanwhile, the designed digital attenuator has a compact chip area of 2.35-mm × 0.9-mm ×0.1-mm.

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What this paper is about

This paper presents a dc to 6-GHz 7-bit digital attenuator with low insertion loss fabricated using E/D-mode GaAs pseudomorphic high electron-mobility transistor (pHEMT) process. By using the simplified T-attenuator to reduce the number of switch transistors, the designed digital attenuator achieves low insertion loss. Measurement results indicate that the designed digital attenuator achieves a 31.75-dB attenuation range with 0.25-dB resolution, smaller than 2.3-dB insertion loss, and less than 0.4-dB RMS attenuation error with better than -10-dB input/output return loss in the frequency range from dc to 6-GHz. Meanwhile, the designed digital attenuator has a compact chip area of 2.35-mm × 0.9-mm ×0.1-mm.

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OpenAlex reports 7 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

This paper presents a dc to 6-GHz 7-bit digital attenuator with low insertion loss fabricated using E/D-mode GaAs pseudomorphic high electron-mobility transistor (pHEMT) process. By using the simplified T-attenuator to reduce the number of switch transistors, the designed digital attenuator achieves low insertion loss. Measurement results indicate that the designed digital attenuator achieves a 31.75-dB attenuation range with 0.25-dB resolution, smaller than 2.3-dB insertion loss, and less than 0.4-dB RMS attenuation error with better than -10-dB input/output return loss in the frequency range from dc to 6-GHz. Meanwhile, the designed digital attenuator has a compact chip area of 2.35-mm × 0.9-mm ×0.1-mm.

Key concepts: Attenuator (electronics), Insertion loss, Return loss, Materials science, Attenuation, Optoelectronics, Optical attenuator, High-electron-mobility transistor

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