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2003•Unpublished venueRequires access

A low-triggering circuitry for dual-direction ESD protection

A.Z. Wang, C.H. Tsay

Open publisher page 9 citations

Abstract

A novel low-triggering, dual-direction on-chip Electrostatic Discharge (ESD) protection circuitry is designed to protect integrated circuits (ICs) against ESD surges in two opposite directions. The compact circuit features low triggering (7.5 V), short response time (<1 ns), symmetric deep snapback I-V characteristics, and low on-resistance (/spl sim//spl Omega/). It passed 14 kV HEM ESD test and is very area efficient (80 V//spl mu/m). The design was predicted by simulation that fits measurement.

About this research paper

What this paper is about

A novel low-triggering, dual-direction on-chip Electrostatic Discharge (ESD) protection circuitry is designed to protect integrated circuits (ICs) against ESD surges in two opposite directions. The compact circuit features low triggering (7.5 V), short response time (<1 ns), symmetric deep snapback I-V characteristics, and low on-resistance (/spl sim//spl Omega/). It passed 14 kV HEM ESD test and is very area efficient (80 V//spl mu/m). The design was predicted by simulation that fits measurement.

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OpenAlex reports 9 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

A novel low-triggering, dual-direction on-chip Electrostatic Discharge (ESD) protection circuitry is designed to protect integrated circuits (ICs) against ESD surges in two opposite directions. The compact circuit features low triggering (7.5 V), short response time (<1 ns), symmetric deep snapback I-V characteristics, and low on-resistance (/spl sim//spl Omega/). It passed 14 kV HEM ESD test and is very area efficient (80 V//spl mu/m). The design was predicted by simulation that fits measurement.

Key concepts: Snapback, Electrostatic discharge, Dual (grammatical number), Integrated circuit, Electrical engineering, Electronic circuit, Integrated circuit design, Engineering

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