THE DEVELOPMENT OF AN ELECTRONIC INTERLOCKING SYSTEM
Ikumasa Okumura
Abstract
Ikumasa Okumura
Abstract
The outline of a newly developed electronic interlocking system is described in this paper. In this system, in order to achieve high safety and high performance efficiently, a hierarchical architecture is used. As to hardware, safety is assured by a fail-safe computer composed of triplex redundant microprocessors with bus-level voting, also including a fail-safe fault detector and fail-safe output voting circuits which assure overall safety. Reliable standardized software is acheived by introducing a geographical data structure and a composite structured programming method; and several improved facilities are provided. This system is now in field tests at Ishiuchi station on Joetsu line.
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The outline of a newly developed electronic interlocking system is described in this paper. In this system, in order to achieve high safety and high performance efficiently, a hierarchical architecture is used. As to hardware, safety is assured by a fail-safe computer composed of triplex redundant microprocessors with bus-level voting, also including a fail-safe fault detector and fail-safe output voting circuits which assure overall safety. Reliable standardized software is acheived by introducing a geographical data structure and a composite structured programming method; and several improved facilities are provided. This system is now in field tests at Ishiuchi station on Joetsu line.
Key concepts: Interlocking, Electronic voting, Reliability engineering, Embedded system, Computer science, Fault (geology), Software, Field (mathematics)