A Case for Amplifying Row Hammer Attacks via Cell-Coupling in DRAM Devices
Kaustav Goswami, Shirshendu Das, Sagar Satapathy, Dip Sankar Banerjee
Abstract
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Kaustav Goswami, Shirshendu Das, Sagar Satapathy, Dip Sankar Banerjee
Abstract
Open-access reader
Main memory technologies have been largely dominated by Dynamic Random Access Memory (DRAM) for several decades. However, the recurring issue of higher latency has compelled researchers to propose In-DRAM based caching techniques. In-DRAM caches have become a popular research topic in recent years as they offer significant improvements over conventional DRAM devices. With every generation, DRAM devices are engineered to be denser. This has caused the emergence of electromagnetic interference within the device, known as row hammering, which causes flipping of bits without accessing the bits.
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Main memory technologies have been largely dominated by Dynamic Random Access Memory (DRAM) for several decades. However, the recurring issue of higher latency has compelled researchers to propose In-DRAM based caching techniques. In-DRAM caches have become a popular research topic in recent years as they offer significant improvements over conventional DRAM devices. With every generation, DRAM devices are engineered to be denser. This has caused the emergence of electromagnetic interference within the device, known as row hammering, which causes flipping of bits without accessing the bits.
Key concepts: Dram, CAS latency, Dynamic random-access memory, Universal memory, Computer science, Random access memory, Latency (audio), Embedded system