20222022 IEEE 13th International Symposium on Power Electronics for Distributed Generation Systems (PEDG)Requires access

Research on Parasitic Inductance Optimization of GaN Paralleled Cascode Power Module

Ruijie Song, Fang Zhuo, Feng Wang, Kefan Yu

Open publisher page 3 citations

Abstract

GaN devices are more susceptible to parasitic inductance due to the high operating frequency and fast switching speed. Aimed at the depletion-mode GaN HEMT paralleled cascode power module for high-power applications, the influence of parasitic inductance on the performance of the devices in the power module is studied. Based on the influence of the current direction on the parasitic inductance, an optimization design method to reduce the parasitic inductance of the module is proposed. Considering the parasitic inductance introduced by the bonding wires, copper traces and copper pillars in the module, the optimization effect of the parasitic parameters of the module was verified by finite element analysis. The optimization effect of parasitic inductance optimization on the switching performance and power dissipation of the module is verified by simulation.

About this research paper

What this paper is about

GaN devices are more susceptible to parasitic inductance due to the high operating frequency and fast switching speed. Aimed at the depletion-mode GaN HEMT paralleled cascode power module for high-power applications, the influence of parasitic inductance on the performance of the devices in the power module is studied. Based on the influence of the current direction on the parasitic inductance, an optimization design method to reduce the parasitic inductance of the module is proposed. Considering the parasitic inductance introduced by the bonding wires, copper traces and copper pillars in the module, the optimization effect of the parasitic parameters of the module was verified by finite element analysis. The optimization effect of parasitic inductance optimization on the switching performance and power dissipation of the module is verified by simulation.

Why it matters

OpenAlex reports 3 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

GaN devices are more susceptible to parasitic inductance due to the high operating frequency and fast switching speed. Aimed at the depletion-mode GaN HEMT paralleled cascode power module for high-power applications, the influence of parasitic inductance on the performance of the devices in the power module is studied. Based on the influence of the current direction on the parasitic inductance, an optimization design method to reduce the parasitic inductance of the module is proposed. Considering the parasitic inductance introduced by the bonding wires, copper traces and copper pillars in the module, the optimization effect of the parasitic parameters of the module was verified by finite element analysis. The optimization effect of parasitic inductance optimization on the switching performance and power dissipation of the module is verified by simulation.

Key concepts: Inductance, Parasitic element, Cascode, Equivalent series inductance, Power (physics), Parasitic capacitance, Electronic engineering, High-electron-mobility transistor

Related papers

Back to paper searchBrowse research topicsOriginal source
Research on Parasitic Inductance Optimization of GaN Paralleled Cascode Power Module — Research Paper | ScholarLens