Scheduling Information-Guided Efficient High-Level Synthesis Design Space Exploration

High-level synthesis (HLS) transforms designs specified by high-level programming language into RTL designs. In order to get the optimal designs, many design space exploration (DSE) methods are proposed. However, most of them consider the HLS tool as a black box, ignoring crucial information from the synthesis process, particularly the scheduling step. In this work, we propose to extract some useful information from scheduling to guide the DSE and develop a genetic algorithm (GA)-based DSE method based on our in-house HLS tool. The experimental results show that our method can obtain more Pareto-optimal points than the counterpart without using the scheduling information. It also outperforms a traditional GA-based HLS DSE method by using only a quarter of the total run time. For a large benchmark, our method finds 95.7% Pareto-optimal designs by visiting only 0.18% total promising design points.