A High-Performance Bidirectional Compiler for Conversion Between SystemC and Verilog
Chenyu Huang, Huaien Gao, Yongfeng Zhong, Shuting Cai
Abstract
Chenyu Huang, Huaien Gao, Yongfeng Zhong, Shuting Cai
Abstract
With the continuous development of chip design technology, many chip description languages continuously emerge. Both Verilog and SystemC play an important role in chip description. Verilog is a widely used hardware description language that can be used in multiple stages of the hardware design process, including modeling, synthesis, and simulation. At the same time, to shorten the design cycle of chips, it has become a trend to use SystemC for hardware design and modeling. Therefore, we need to this end to convert between the two, namely Verilog And SystemC(VASC), is proposed. Experiments show that, compared to existing open-source tools, the VASC has excellent accuracy and faster compilation speed.
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With the continuous development of chip design technology, many chip description languages continuously emerge. Both Verilog and SystemC play an important role in chip description. Verilog is a widely used hardware description language that can be used in multiple stages of the hardware design process, including modeling, synthesis, and simulation. At the same time, to shorten the design cycle of chips, it has become a trend to use SystemC for hardware design and modeling. Therefore, we need to this end to convert between the two, namely Verilog And SystemC(VASC), is proposed. Experiments show that, compared to existing open-source tools, the VASC has excellent accuracy and faster compilation speed.
Key concepts: SystemC, Verilog, Computer science, Compiler, Hardware description language, Computer architecture, Embedded system, Transaction-level modeling