A workstation-mixed model circuit simulator

A new mixed mode simulator is described, which combines a behavioral timing simulator, a switch level simulator, and a new circuit-level simulator based upon the ADEPT timing simulation algorithm. These simulation algorithms are combined into a single, consistent, interactive MOS simulator. In addition, STAFAN fault simulation is provided at the transistor level to grade vectors to be used in the testing phase of design. In this paper, each algorithm is described as well as the interfacing required between each of the simulation methods.