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2005•Unpublished venueRequires access

A CMOS TV tuner/demodulator IC with digital image rejection

Chun-Huat Heng, M. Gupta, Sang-Hoon Lee, David C. Kang, Bang‐Sup Song

Open publisher page 3 citations

Abstract

A single-chip TV tuner/demodulator IC using a low-IF dual-conversion architecture is implemented. It receives the NTSC/PAL/SECAM signals in the 48 to 860MHz frequency range without off-chip image filters, and performs channel selection, image rejection. and video/sound demodulation digitally. The 6/spl times/6mm/sup 2/ chip in 0.25 /spl mu/m CMOS with on-chip 75/spl Omega/ cable driver consumes 1W from a 2.5V supply.

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What this paper is about

A single-chip TV tuner/demodulator IC using a low-IF dual-conversion architecture is implemented. It receives the NTSC/PAL/SECAM signals in the 48 to 860MHz frequency range without off-chip image filters, and performs channel selection, image rejection. and video/sound demodulation digitally. The 6/spl times/6mm/sup 2/ chip in 0.25 /spl mu/m CMOS with on-chip 75/spl Omega/ cable driver consumes 1W from a 2.5V supply.

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Available abstract

A single-chip TV tuner/demodulator IC using a low-IF dual-conversion architecture is implemented. It receives the NTSC/PAL/SECAM signals in the 48 to 860MHz frequency range without off-chip image filters, and performs channel selection, image rejection. and video/sound demodulation digitally. The 6/spl times/6mm/sup 2/ chip in 0.25 /spl mu/m CMOS with on-chip 75/spl Omega/ cable driver consumes 1W from a 2.5V supply.

Key concepts: Tuner, NTSC, Demodulation, CMOS, Chip, Computer science, Image response, Electronic engineering

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