SERDES technology for gigabit I/O communications in storage area networking
K. Iniewski, R. Badalone, M. Lapointe, M. Syrzycki
Abstract
K. Iniewski, R. Badalone, M. Lapointe, M. Syrzycki
Abstract
The paper reviews SERDES technology for storage area networking. A concept of a data switch is introduced to illustrate important role played by switching and backplane SERDES ICs. Selected state-of-the-art devices: 10 Gb/s line side SERDES and backplane drivers are discussed in detail. Particular emphasis is placed on challenges associated with design of high-speed mixed-signal circuitry.
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The paper reviews SERDES technology for storage area networking. A concept of a data switch is introduced to illustrate important role played by switching and backplane SERDES ICs. Selected state-of-the-art devices: 10 Gb/s line side SERDES and backplane drivers are discussed in detail. Particular emphasis is placed on challenges associated with design of high-speed mixed-signal circuitry.
Key concepts: SerDes, Backplane, Gigabit, Computer science, Transceiver, Embedded system, Computer hardware, Telecommunications