2013•Communications in computer and information scienceRequires access

A Modified Gate Replacement Algorithm for Leakage Reduction Using Dual-Tox in CMOS VLSI Circuits

Surabhi Singh, Brajesh Kumar Kaushik, Sudeb Dasgupta

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Key concepts: Subthreshold conduction, CMOS, Leakage (economics), Very-large-scale integration, Electronic engineering, Electronic circuit, Stacking, Transistor

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A Modified Gate Replacement Algorithm for Leakage Reduction Using Dual-Tox in CMOS VLSI Circuits — Research Paper | ScholarLens