Implementing Quadratic Function with Resource Constraints Using Microblaze Soft-Core in Xilinx EDK

The paper introduces an approach to solve a quadratic equation with resource constraints using MicroBlaze soft-core processor in Xilinx EDK including both hardware and software frameworks that are used in building and implementing the system. The paper also proposes a methodology to design and implement a customized IP core for MicroBlaze-based SoC. The uniqueness of this system lies in its implementation of the solution of the quadratic equation by passing data to an adder and a multiplier core that are interfaced to the MicroBlaze-based system that was implemented on Spartan 6 xc6slx45 FPGA. A VHDL code was written for the adder and multiplier core. An embedded C code was written to run the MicroBlaze SoC in the Xilinx SDK. A board from Digilent having Xilinx Spartan 6 xc6slx45 FPGA, Xilinx ISE 12.3, Xilinx EDK 12.3 and Xilinx SDK 12.3 was used to design and implement the system, and the output was demonstrated via UART on hyper-terminal of a computer.