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2021•Analog Integrated Circuits and Signal ProcessingRequires access

Area and power delay product efficient level restored hybrid full adder (LR-HFA)

V. J. Arulkarthick, Thiruvengadam Rajagopal, Arvind Chakrapani, K. Srihari

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Key concepts: Adder, Power–delay product, Serial binary adder, Computer science, CMOS, Carry-save adder, Cadence, Electronic engineering

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Area and power delay product efficient level restored hybrid full adder (LR-HFA) — Research Paper | ScholarLens