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A 16 ns 1 Mb CMOS EPROM

S. Atsumi, M. Kuriyama, K. Imamiya, Y. Iyama, N. Matsukawa, Hideo Araki, K. Narita, S. Tanaka

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Abstract

A 64 K*16-b CMOS EPROM which achieves 16-ns access time using differential sensing with a constant-bias circuit is described. A compact test sense amplifier circuit in parallel with the main sense amplifier guarantees sufficient threshold voltage shift for the programmed cell for high-speed sensing. Complementary data are programmed into the pair of FAMOS transistors, which form one memory cell. The device is fabricated with double-layer-metal, 0.8- mu m n-well CMOS technology.>

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What this paper is about

A 64 K*16-b CMOS EPROM which achieves 16-ns access time using differential sensing with a constant-bias circuit is described. A compact test sense amplifier circuit in parallel with the main sense amplifier guarantees sufficient threshold voltage shift for the programmed cell for high-speed sensing. Complementary data are programmed into the pair of FAMOS transistors, which form one memory cell. The device is fabricated with double-layer-metal, 0.8- mu m n-well CMOS technology.>

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Available abstract

A 64 K*16-b CMOS EPROM which achieves 16-ns access time using differential sensing with a constant-bias circuit is described. A compact test sense amplifier circuit in parallel with the main sense amplifier guarantees sufficient threshold voltage shift for the programmed cell for high-speed sensing. Complementary data are programmed into the pair of FAMOS transistors, which form one memory cell. The device is fabricated with double-layer-metal, 0.8- mu m n-well CMOS technology.>

Key concepts: EPROM, CMOS, Differential amplifier, Transistor, Electrical engineering, Computer science, Sense amplifier, Amplifier

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