A Virtual Verification Environment for the Sequence Control System Using VRML and JAVA

Abstract This paper describes a visual simulation tool for reliable off-line development, verification and debugging of the control code of the Programmable Logic Controller (PLC) in the sequence control system. First, we discuss the uniform modeling method of the dynamic behavior of various components in a factory (actuators, sensors, operating panels, etc.) as the object model and state transition model. Then we propose the implementation method of the object model by VRML and JAVA. They enable us to uniformly describe the state-transition and corresponding dynamic behavior of the 3-D geometry of each object model. Moreover, we can use a standard VRML viewer which has the event-driven execution mechanism as a visual simulation tool. The effectiveness of proposed implementation and simulation is confirmed through the case study on the co-simulation of combining the component model with a real PLC.