2020Unpublished venueRequires access

A Ka-Band CMOS Programmable Gain Amplifier with 15 dB Gain Tuning Range for Phased Arrays

Yongjie Li, Biao Deng, Wei Lv, Zongming Duan, Zipeng Xie, Liguo Sun

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Abstract

A Ka-band 65 nm CMOS programmable gain amplifier (PGA) for phased array systems is presented in this paper. It is mainly composed of transformer-based input/output balun, seven parallel binary weighted digital programmable gain control units. Redundant control bit design, and off-chip FPGA are good for programmable testing, state selection and application. The PGA's 3dB bandwidth is 31-37GHz, which achieves a gain adjustment range of 15dB (-6.7~8.3dB), stepping by 0.5dB. At the same time, the RMS error of phase variation is less than 3.9 degrees in 31-37GHz. The power consumption of the presented PGA is 9mW and the core area of the chip is 170 μm 620 μm.

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What this paper is about

A Ka-band 65 nm CMOS programmable gain amplifier (PGA) for phased array systems is presented in this paper. It is mainly composed of transformer-based input/output balun, seven parallel binary weighted digital programmable gain control units. Redundant control bit design, and off-chip FPGA are good for programmable testing, state selection and application. The PGA's 3dB bandwidth is 31-37GHz, which achieves a gain adjustment range of 15dB (-6.7~8.3dB), stepping by 0.5dB. At the same time, the RMS error of phase variation is less than 3.9 degrees in 31-37GHz. The power consumption of the presented PGA is 9mW and the core area of the chip is 170 μm 620 μm.

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Available abstract

A Ka-band 65 nm CMOS programmable gain amplifier (PGA) for phased array systems is presented in this paper. It is mainly composed of transformer-based input/output balun, seven parallel binary weighted digital programmable gain control units. Redundant control bit design, and off-chip FPGA are good for programmable testing, state selection and application. The PGA's 3dB bandwidth is 31-37GHz, which achieves a gain adjustment range of 15dB (-6.7~8.3dB), stepping by 0.5dB. At the same time, the RMS error of phase variation is less than 3.9 degrees in 31-37GHz. The power consumption of the presented PGA is 9mW and the core area of the chip is 170 μm 620 μm.

Key concepts: Programmable-gain amplifier, Automatic gain control, CMOS, Phased array, Balun, Electronic engineering, Amplifier, Chip

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