Equivalence Checking Methods for Analog Circuits Using Continuous Reachable Sets

In this paper, we propose a new methodology for equivalence checking in the AMS domain. On top of comparing two existing approaches, we define a new methodology using continuous reachable sets. The approaches are illustrated upon two existing abstract modeling techniques. Moreover, the generated models are compared against a conformant model that captures the measured system behavior from the real circuit. These modeling methodologies yield hybrid automatons (HAs), which along with the netlist, are compared using different equivalence checking methods demonstrating verification techniques on different abstraction levels. Finally, we discuss the methodologies with respect to an efficient and safe circuit design.