Accurate Inductance Models of Mounted Two-Terminal Decoupling Capacitors

The inductance associated with a decoupling capacitor is typically represented with a constant equivalent series inductance (ESL). In reality, this inductance depends on how the capacitor is mounted and on coupling to closely located structures, including the traces and vias connecting the capacitor to the power and return planes. Here, a method is proposed to quickly and accurately compute the inductance associated with decoupling capacitors and their connections to the power planes. We call this equivalent inductance Labove,decap. It is calculated by partitioning the geometry into sub-models for the connections to the power and return planes and for the mounted capacitor and pads. The accuracy of the partitioning approach is demonstrated in simulation and experiments using two common decoupling capacitor layouts. Simulations are performed using the finite element method (FEM) and the partial element equivalent circuit (PEEC) method. The partitioning approach estimates the overall inductance associated with the decoupling capacitor and its connections to the power bus within 16% if the distance between the capacitor and reference plane (dielectric thickness) is not more than 6 mils. A simplified PEEC model was further developed which allows a user to estimate the inductance associated with the capacitor using closed-form expressions. This simplified model estimates the capacitor's inductance within 14% of the results found using FEM. The models presented in this work should help both the power distribution network tool designer as well as the design engineer to obtain more accurate inductance estimates than is possible using the manufacturer's ESL value.