2020Journal of the Society for Information DisplayRequires access

Vertically integrated, double stack oxide TFT layers for high‐resolution AMOLED backplane

Suhui Lee, Yuanfeng Chen, Jeonggi Kim, Jin Jang

Open publisher page 14 citations

Abstract

Abstract We developed a novel vertically integrated, double stack oxide thin‐film transistor (TFT) backplane for high‐resolution organic light‐emitting diode (OLED) displays. The first TFT layer is bulk‐accumulation mode, and the second TFT layer is a single gate with back‐channel etched structure. The extracted mobilities and threshold voltages are higher than 10 cm2/Vs and 0 ~ 1 V, respectively. Both TFTs are found to be extremely stable under the bias and temperature stress. The gate driver with width of 530 μm and a pitch of 18.6 μm was developed, exhibiting well shifted signal up to the last stage of 900 stages without output degradation, which could be used for 1360 ppi TFT backplane.

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What this paper is about

Abstract We developed a novel vertically integrated, double stack oxide thin‐film transistor (TFT) backplane for high‐resolution organic light‐emitting diode (OLED) displays. The first TFT layer is bulk‐accumulation mode, and the second TFT layer is a single gate with back‐channel etched structure. The extracted mobilities and threshold voltages are higher than 10 cm2/Vs and 0 ~ 1 V, respectively. Both TFTs are found to be extremely stable under the bias and temperature stress. The gate driver with width of 530 μm and a pitch of 18.6 μm was developed, exhibiting well shifted signal up to the last stage of 900 stages without output degradation, which could be used for 1360 ppi TFT backplane.

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Available abstract

Abstract We developed a novel vertically integrated, double stack oxide thin‐film transistor (TFT) backplane for high‐resolution organic light‐emitting diode (OLED) displays. The first TFT layer is bulk‐accumulation mode, and the second TFT layer is a single gate with back‐channel etched structure. The extracted mobilities and threshold voltages are higher than 10 cm2/Vs and 0 ~ 1 V, respectively. Both TFTs are found to be extremely stable under the bias and temperature stress. The gate driver with width of 530 μm and a pitch of 18.6 μm was developed, exhibiting well shifted signal up to the last stage of 900 stages without output degradation, which could be used for 1360 ppi TFT backplane.

Key concepts: Backplane, AMOLED, Stack (abstract data type), Materials science, Thin-film transistor, Optoelectronics, Computer science, Layer (electronics)

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