FPGA Implementation of SPI Bus Communication Based on State Machine Method

Abstract The SPI bus is a synchronous serial interface data bus with full duplex, few signal lines, simple protocol, and fast transmission speed. Based on these characteristics, parallel high-speed computing with FPGA is used to meet device expansion and experiment in high-rate environments. This paper introduces the structure and working principle of SPI communication bus, analyzes its timing structure and four working modes, and uses this state machine method to realize its SPI bus communication function on FPGA. The module circuit of SPI is written by Verilog hardware description language, and the waveform is simulated in vivado simulator. After the simulation waveform analysis, the feasibility of the state machine method is verified.