Design an Advanced Encryption Standard (Aes) Algorithm

Now a days, VLSI application speed and area reduction is very important one. In this paper AES algorithm is implemented. AES represents an algorithm for advance encryption standard of different operation required in the steps of encryption and decryption. Advanced Encryption Standard (AES) is the most efficient public key encryption system which is based on Rijndael Algorithm that can be used to create faster and efficient cryptographic keys. The proposed architecture is based on optimizing area in terms of reducing and improve throughput for design of AES algorithm in VHDL. This paper presents AES-128 bit algorithm design consist of 128 bit symmetric key and XILINX ISE 14.1 project used for synthesis and simulation of this proposed design.