A novel design and implementation of FPGA based 3D-CORDIC processor

A new complete design and implementation of FPGA-based Three DimensionsCORDIC processor (3D-CORDIC)is introduced. Efficient mappings on FPGA havebeen performed leading to the fastest implementations. Simulation process have beenperformed for the proposed 3D-CORDIC processor using ModelSim SE tools of MentorGraphics simulations and the MATLAB Software simulations, a good agreement of theproposed processor performance has been achieved. The 3D-CORDIC processorarchitecture has been implemented with 12 bit word-length in Xilinx Spartan-II seriesfield programmable gates arrays (FPGA). The 3D-CORDIC processor use only 37 % ofSLICEs and 52 % of IOBs with maximum clock frequency 116 MHz, which is suitablefor many CORDIC processor applications.