CMOS Implementation of RF PLL Frequency Synthesizer

An integrated RF PLL frequency synthesizer is presented.It integrates VCO,dual-modulus prescaler,PFD,Charge-pump,various digital counters,control logic and the series interface with the base-band processor into a single chip.Also the selection of internal VCO or external VCO and power control are implemented to adapt to various applications.The frequency synthesizer has been implemented in 0.25μm CMOS process.The measured results show that the locked range is 1.82GHz-1.96GHz when the internal VCO is selected,the phase noise could reach -119.25dBc/Hz at 25MHz offset from the carrier 1.924GHz.The analog part uses a 2.7V power supply and the consumed current is about 48mA.