ScholarLens Back to search
2018•2018 2nd International Conference on I-SMAC (IoT in Social, Mobile, Analytics and Cloud) (I-SMAC)I-SMAC (IoT in Social, Mobile, Analytics and Cloud) (I-SMAC), 2018 2nd International Conference onRequires access

Design of Two Stage CMOS Op-Amp with High Slew Rate and High Gain in 180nm

Akhil Gupta, Shweta Singh

Open publisher page 9 citations

Abstract

This paper present a CMOS two stage op-amp using 180nm technology. Keeping the 1.8 V dc supply with 50uA bias current this amplifier produces a gain greater than 66dB along with a very high slew rate of 95 V/us. On decreasing the current the gain can be increase but the slew rate will also decrease which will going to effect the sensitivity of the amplifier. Therefore a high slew rate amplifier has design along with high gain without any much power consumption. The various parameter such as Gain Bandwidth Product, Phase margin, Power consumption are measured. The results shows that the on decreasing the size of MOSFETs the power dissipation also decreases.

About this research paper

What this paper is about

This paper present a CMOS two stage op-amp using 180nm technology. Keeping the 1.8 V dc supply with 50uA bias current this amplifier produces a gain greater than 66dB along with a very high slew rate of 95 V/us. On decreasing the current the gain can be increase but the slew rate will also decrease which will going to effect the sensitivity of the amplifier. Therefore a high slew rate amplifier has design along with high gain without any much power consumption. The various parameter such as Gain Bandwidth Product, Phase margin, Power consumption are measured. The results shows that the on decreasing the size of MOSFETs the power dissipation also decreases.

Why it matters

OpenAlex reports 9 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

This paper present a CMOS two stage op-amp using 180nm technology. Keeping the 1.8 V dc supply with 50uA bias current this amplifier produces a gain greater than 66dB along with a very high slew rate of 95 V/us. On decreasing the current the gain can be increase but the slew rate will also decrease which will going to effect the sensitivity of the amplifier. Therefore a high slew rate amplifier has design along with high gain without any much power consumption. The various parameter such as Gain Bandwidth Product, Phase margin, Power consumption are measured. The results shows that the on decreasing the size of MOSFETs the power dissipation also decreases.

Key concepts: Slew rate, Phase margin, Gain–bandwidth product, Fully differential amplifier, Operational amplifier, Open-loop gain, CMOS, Amplifier

Related papers

Related paper 1Related paper 2Related paper 3
Back to paper searchBrowse research topicsOriginal source
Design of Two Stage CMOS Op-Amp with High Slew Rate and High Gain in 180nm — Research Paper | ScholarLens