ScholarLens Back to search
2012•Unpublished venueRequires access

Design of a Multistage Amplifier with High Gain and Wide Bandwidth Performance

Benqiang Lv, Xiaohong Peng, Zhiding Zhu, Xiaoqing Li, Yong Hu, Yunkang Liu

Open publisher page 1 citations

Abstract

A high performance design of a three-stage amplifier is presented in this paper using the Impedance Adapting Compensation (IAC). The circuit is designed in 0.35 μm CMOS technology with 3.3V voltage power supply. When driving a 150 pF capacitive load, this amplifier achieves as high as 144dB dc gain,7.44MHz gain-bandwidth product (GBW) ,60° phase margin(PM),1.26V/us slew rate (SR) and 0.95mW power dissipation. This work provides a higher dc gain and wider GBW compared to other multistage amplifiers.

About this research paper

What this paper is about

A high performance design of a three-stage amplifier is presented in this paper using the Impedance Adapting Compensation (IAC). The circuit is designed in 0.35 μm CMOS technology with 3.3V voltage power supply. When driving a 150 pF capacitive load, this amplifier achieves as high as 144dB dc gain,7.44MHz gain-bandwidth product (GBW) ,60° phase margin(PM),1.26V/us slew rate (SR) and 0.95mW power dissipation. This work provides a higher dc gain and wider GBW compared to other multistage amplifiers.

Why it matters

OpenAlex reports 1 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

A high performance design of a three-stage amplifier is presented in this paper using the Impedance Adapting Compensation (IAC). The circuit is designed in 0.35 μm CMOS technology with 3.3V voltage power supply. When driving a 150 pF capacitive load, this amplifier achieves as high as 144dB dc gain,7.44MHz gain-bandwidth product (GBW) ,60° phase margin(PM),1.26V/us slew rate (SR) and 0.95mW power dissipation. This work provides a higher dc gain and wider GBW compared to other multistage amplifiers.

Key concepts: Gain–bandwidth product, Phase margin, Fully differential amplifier, Open-loop gain, Amplifier, Electrical engineering, RF power amplifier, Slew rate

Related papers

Related paper 1Related paper 2Related paper 3
Back to paper searchBrowse research topicsOriginal source
Design of a Multistage Amplifier with High Gain and Wide Bandwidth Performance — Research Paper | ScholarLens