A Fault Injection Platform Supporting Both SEU and Multiple SEUs for SRAM-Based FPGA
Rongsheng Zhang, Liyi Xiao, Jie Li, Xuebing Cao, Chunhua Qi
Abstract
Rongsheng Zhang, Liyi Xiao, Jie Li, Xuebing Cao, Chunhua Qi
Abstract
A fault injection platform which supports both single event upset (SEU) and multiple SEUs for SRAM-based field programmable gate arrays (FPGA) is proposed. The fault injector can inject SEU or accumulated multiple SEUs and repair the SEUs by itself. The proposed fault injection platform is fast because the address generator can generate available value in real time. We show the error rates of the SEU test and multiple SEUs test. The experimental results indicate that SEU has an impact on the sensitivity of design to the next SEU in SRAM-based FPGA.
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A fault injection platform which supports both single event upset (SEU) and multiple SEUs for SRAM-based field programmable gate arrays (FPGA) is proposed. The fault injector can inject SEU or accumulated multiple SEUs and repair the SEUs by itself. The proposed fault injection platform is fast because the address generator can generate available value in real time. We show the error rates of the SEU test and multiple SEUs test. The experimental results indicate that SEU has an impact on the sensitivity of design to the next SEU in SRAM-based FPGA.
Key concepts: Fault injection, Static random-access memory, Single event upset, Field-programmable gate array, Embedded system, Upset, Fault (geology), Soft error