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2018•Digital Signal ProcessingRequires access

Design of High Gain Bandwidth CMOS Operational Amplifier

Deepak Kurwade, Madan B. Mali

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Abstract

Operational amplifier plays to be the fundamental concrete block of analog CMOS VLSI. Communication systems are demanding high Gain- Bandwidth (GBW) operational amplifier. Real time demands of communication systems are stringent. This opamp is presented to outplay these real time stringent constraints and plays vital role in communication applications. Single ended differential amplifiers have limitations on attaining high Gain-Bandwidth factor. So, to get over limitation of gain bandwidth, balanced in balanced out topology is presented for this operational amplifier design. To attain desired Gain-Bandwidth two NMOS balanced in balanced out stages are cascaded. Common Mode (CM) voltage of each NMOS stage is stabilized by Common Mode Feedback (CMFB) amplifier to each stage. This op-amp loaded with 100 fF capacitance achieves 2.37 GHz unity Gain-Bandwidth with 45.44° phase margin along with 57.72 dB DC gain.

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What this paper is about

Operational amplifier plays to be the fundamental concrete block of analog CMOS VLSI. Communication systems are demanding high Gain- Bandwidth (GBW) operational amplifier. Real time demands of communication systems are stringent. This opamp is presented to outplay these real time stringent constraints and plays vital role in communication applications. Single ended differential amplifiers have limitations on attaining high Gain-Bandwidth factor. So, to get over limitation of gain bandwidth, balanced in balanced out topology is presented for this operational amplifier design. To attain desired Gain-Bandwidth two NMOS balanced in balanced out stages are cascaded. Common Mode (CM) voltage of each NMOS stage is stabilized by Common Mode Feedback (CMFB) amplifier to each stage. This op-amp loaded with 100 fF capacitance achieves 2.37 GHz unity Gain-Bandwidth with 45.44° phase margin along with 57.72 dB DC gain.

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Available abstract

Operational amplifier plays to be the fundamental concrete block of analog CMOS VLSI. Communication systems are demanding high Gain- Bandwidth (GBW) operational amplifier. Real time demands of communication systems are stringent. This opamp is presented to outplay these real time stringent constraints and plays vital role in communication applications. Single ended differential amplifiers have limitations on attaining high Gain-Bandwidth factor. So, to get over limitation of gain bandwidth, balanced in balanced out topology is presented for this operational amplifier design. To attain desired Gain-Bandwidth two NMOS balanced in balanced out stages are cascaded. Common Mode (CM) voltage of each NMOS stage is stabilized by Common Mode Feedback (CMFB) amplifier to each stage. This op-amp loaded with 100 fF capacitance achieves 2.37 GHz unity Gain-Bandwidth with 45.44° phase margin along with 57.72 dB DC gain.

Key concepts: Operational amplifier, Phase margin, Fully differential amplifier, Gain–bandwidth product, Operational transconductance amplifier, Open-loop gain, Direct-coupled amplifier, Computer science

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