2009Unpublished venueRequires access

Design of low-voltage high performance CMOS-Current feedback amplifier using indirect feedback compensated Op-Amp

Romesh Kr. Nandwana, Mahima Arrawatia, Nilesh Goel

Open publisher page 3 citations

Abstract

In this paper low-voltage high performance CMOS current feedback amplifier is designed using indirect feedback compensated operational amplifier and the results are compared with the existing topology. The operational-amplifier used has the open loop gain of 101.8 dB with 25 ns settling time, unity gain bandwidth 169.8 MHz, phase margin 70° with rail to rail output swing. The CMOS-current feedback amplifier designed using this operational-amplifier has nearly gain independent bandwidth with settling time observed as 44 ns and slew rate increment up to 20 V/¿s. The circuit is designed at 0.18 ¿m digital CMOS process with supply voltage 1.8 volt.

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What this paper is about

In this paper low-voltage high performance CMOS current feedback amplifier is designed using indirect feedback compensated operational amplifier and the results are compared with the existing topology. The operational-amplifier used has the open loop gain of 101.8 dB with 25 ns settling time, unity gain bandwidth 169.8 MHz, phase margin 70° with rail to rail output swing. The CMOS-current feedback amplifier designed using this operational-amplifier has nearly gain independent bandwidth with settling time observed as 44 ns and slew rate increment up to 20 V/¿s. The circuit is designed at 0.18 ¿m digital CMOS process with supply voltage 1.8 volt.

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Available abstract

In this paper low-voltage high performance CMOS current feedback amplifier is designed using indirect feedback compensated operational amplifier and the results are compared with the existing topology. The operational-amplifier used has the open loop gain of 101.8 dB with 25 ns settling time, unity gain bandwidth 169.8 MHz, phase margin 70° with rail to rail output swing. The CMOS-current feedback amplifier designed using this operational-amplifier has nearly gain independent bandwidth with settling time observed as 44 ns and slew rate increment up to 20 V/¿s. The circuit is designed at 0.18 ¿m digital CMOS process with supply voltage 1.8 volt.

Key concepts: Operational amplifier, Operational transconductance amplifier, Current-feedback operational amplifier, Fully differential amplifier, Phase margin, Direct-coupled amplifier, Open-loop gain, Buffer amplifier

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