Design and Implementation of Modified DDS Based on FPGA

Frequency synthesizer is known as the "heart" of electronic systems, direct digital frequency synthesizer (DDS) relative to the first two generation of frequency synthesis technology has obvious advantages, but also existing traditional structure of the DDS output stray too, shortage of output frequency is limited. Aiming at these two problems, the overall structure of DDS is improved by compression algorithm, phase jitter and balanced DAC structure. The parallel phase accumulator is designed with parallel and flow technology, and the output frequency of the system is improved. At the same time, using the FPGA technology, the various modules were implemented by Verilog HDL language design, and finally the modified DDS model was completed based on FPGA design.