Inverter performance analysis of 3D double gate junctionless transistor
Achinta Baidya, Trupti Ranjan Lenka, Srimanta Baishya
Abstract
Achinta Baidya, Trupti Ranjan Lenka, Srimanta Baishya
Abstract
In this paper, 3D double gate junctionless transistor made inverter circuit performance is investigated using mixed mode simulation. Detailed analysis of inverter characteristics like noise margin, propagation delay are performed for different gate lengths and different power supplies. We presented a comparative analysis of inverter characteristics with different existing structure of junctionless transistor. Proposed double gate junctionless transistor performed well compared to other existing inverters and showed its candidature for future integrated circuits.
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In this paper, 3D double gate junctionless transistor made inverter circuit performance is investigated using mixed mode simulation. Detailed analysis of inverter characteristics like noise margin, propagation delay are performed for different gate lengths and different power supplies. We presented a comparative analysis of inverter characteristics with different existing structure of junctionless transistor. Proposed double gate junctionless transistor performed well compared to other existing inverters and showed its candidature for future integrated circuits.
Key concepts: Noise margin, Inverter, Transistor, Logic gate, Double gate, Noise (video), Electronic engineering, Electrical engineering