2017Unpublished venueRequires access

A correlator-based FPGA implementation of a QAM system

Brayan J. Saenz, Ivan Ladino

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Abstract

In this paper is presented a simple and quite general QAM Modulation Scheme implemented on FPGA. The coder and decoder blocks of the system are designed and implemented in VHDL, so resulting in parametrized entities capable of operating both as PAM and QAM schemes. The design of these blocks results in a simple regular structure, which is replicated as much as desired, allowing large enough QAM and PAM signal spaces, i.e. with a large bit throughput.

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What this paper is about

In this paper is presented a simple and quite general QAM Modulation Scheme implemented on FPGA. The coder and decoder blocks of the system are designed and implemented in VHDL, so resulting in parametrized entities capable of operating both as PAM and QAM schemes. The design of these blocks results in a simple regular structure, which is replicated as much as desired, allowing large enough QAM and PAM signal spaces, i.e. with a large bit throughput.

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Available abstract

In this paper is presented a simple and quite general QAM Modulation Scheme implemented on FPGA. The coder and decoder blocks of the system are designed and implemented in VHDL, so resulting in parametrized entities capable of operating both as PAM and QAM schemes. The design of these blocks results in a simple regular structure, which is replicated as much as desired, allowing large enough QAM and PAM signal spaces, i.e. with a large bit throughput.

Key concepts: Quadrature amplitude modulation, QAM, Computer science, Field-programmable gate array, VHDL, Throughput, Simple (philosophy), Scheme (mathematics)

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