Design of hybrid memristor-MOS XOR and XNOR logic gates
Xiaoyan Xu, Xiaole Cui, Mengying Luo, Qiujun Lin, Yichi Luo, Yufeng Zhou
Abstract
Xiaoyan Xu, Xiaole Cui, Mengying Luo, Qiujun Lin, Yichi Luo, Yufeng Zhou
Abstract
Two hybrid memristor-MOS exclusive OR (XOR) and exclusive NOR (XNOR) logic gates based on Memristor Ratioed Logic (MRL) are presented. The proposed gates present logic states with voltages, and implement the logic operation within one clock cycle. The designs ease the voltage degradation problem of the original MRL logic gates, while consuming fewer area overhead and less delay than their counterparts.
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Two hybrid memristor-MOS exclusive OR (XOR) and exclusive NOR (XNOR) logic gates based on Memristor Ratioed Logic (MRL) are presented. The proposed gates present logic states with voltages, and implement the logic operation within one clock cycle. The designs ease the voltage degradation problem of the original MRL logic gates, while consuming fewer area overhead and less delay than their counterparts.
Key concepts: XNOR gate, Pass transistor logic, Logic gate, AND-OR-Invert, Computer science, Logic family, Memristor, Diode–transistor logic