2019International Journal of Engineering and Advanced TechnologyOpen access

Power and Delay Estimation of universal and Exclusive gates using Static and Dynamic CMOS Design

A Surya

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Abstract

In this paper, designing the universal gate and exclusive gates using static, pseudo nmos and dynamic cmos design and calculate the power and delay by using microwind simulator. We can implement any Boolean functions as well as basic gate using universal gates NAND and NOR .exclusive gate XOR and XNOR are used for error detection and correction in digital communication circuits.

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What this paper is about

In this paper, designing the universal gate and exclusive gates using static, pseudo nmos and dynamic cmos design and calculate the power and delay by using microwind simulator. We can implement any Boolean functions as well as basic gate using universal gates NAND and NOR .exclusive gate XOR and XNOR are used for error detection and correction in digital communication circuits.

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Available abstract

In this paper, designing the universal gate and exclusive gates using static, pseudo nmos and dynamic cmos design and calculate the power and delay by using microwind simulator. We can implement any Boolean functions as well as basic gate using universal gates NAND and NOR .exclusive gate XOR and XNOR are used for error detection and correction in digital communication circuits.

Key concepts: XNOR gate, NAND gate, NMOS logic, NOR gate, CMOS, AND-OR-Invert, Logic gate, Computer science

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Power and Delay Estimation of universal and Exclusive gates using Static and Dynamic CMOS Design — Research Paper | ScholarLens