2017•viXraRequires access
Lattice Mismatches of Vertical 2D/3D Semiconductor Heterostructures
Donghwi Park
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Abstract
Various lattice mismatches at room temperature and 750 °C in van der Waals (vdW) heterostructures of semiconductors were calculated. These calculations propose new substrate for 2D semiconductor synthesis. It is reported that aligned vertical 2D/3D semiconductor heterostructure is synthesysed in lattice matched system. In this article, Various lattice mismatch at room temperature and 750 °C in van der Waals (vdW) heterostructures of semiconductor was calculated. The calculation proposes new substrate for 2D semiconductor synthesis. This calculation suggests MoSe2/ZnO is a lattice-matched 2D/3D semiconductor heterostructure with low mismatch.