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A ew /S Co-design Methodology to enerate a System evel Platform Based on ISA

Shao Pu Yang, Yu Qian, Hang Tie-Jun, Shan Rui, Hou Chao-Huan

Open publisher page 1 citations

Abstract

A new methodology to build HW/SW co-design platform based on machine description language-LISA is presented in this paper. The most important aims of this method are to model a retargetable processor at the early stage of HW/SW co-design so as to get optimum results for system level analysis. Also it helps to speed up time-to-market and ease manual work. Furthermore, this method is flexible and can be used for designing either general purpose processor (GPP) or application specified instruction-set processor (ASIP). With the design flow, we have been able to verify and evaluate one VLIW processor - SuperV2 in less than one month.

About this research paper

What this paper is about

A new methodology to build HW/SW co-design platform based on machine description language-LISA is presented in this paper. The most important aims of this method are to model a retargetable processor at the early stage of HW/SW co-design so as to get optimum results for system level analysis. Also it helps to speed up time-to-market and ease manual work. Furthermore, this method is flexible and can be used for designing either general purpose processor (GPP) or application specified instruction-set processor (ASIP). With the design flow, we have been able to verify and evaluate one VLIW processor - SuperV2 in less than one month.

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Available abstract

A new methodology to build HW/SW co-design platform based on machine description language-LISA is presented in this paper. The most important aims of this method are to model a retargetable processor at the early stage of HW/SW co-design so as to get optimum results for system level analysis. Also it helps to speed up time-to-market and ease manual work. Furthermore, this method is flexible and can be used for designing either general purpose processor (GPP) or application specified instruction-set processor (ASIP). With the design flow, we have been able to verify and evaluate one VLIW processor - SuperV2 in less than one month.

Key concepts: Very long instruction word, Computer science, Instruction set, Processor design, Computer architecture, Design flow, Set (abstract data type), Design methods

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