1992Microelectronics JournalRequires access

iHARP: a multiple instruction processor chip incorporating RISC and VLIW design features

S.A. Trainis, P.A. Findlay, G.B. Steven, R.G. Adams, D. McHale

Open publisher page 0 citations

Abstract

This record does not include an abstract. Use the full-text link above if available.

About this research paper

What this paper is about

An abstract is not available in the OpenAlex record for this paper.

Why it matters

A significance statement is not available in the OpenAlex record.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Key concepts: Very long instruction word, Reduced instruction set computing, Computer science, Instructions per cycle, Instruction set, Computer architecture, Processor design, Application-specific instruction-set processor

Related papers

Back to paper searchBrowse research topicsOriginal source
iHARP: a multiple instruction processor chip incorporating RISC and VLIW design features — Research Paper | ScholarLens