2002Unpublished venueRequires access

The PowerPC 603 microprocessor: a low-power design for portable applications

S. Gary, C. Dietz, J. Eno, G. Gerosa, Sung Min Park, H. Sanchez

Open publisher page 22 citations

Abstract

The PowerPC 603 microprocessor is a low-power implementation of the PowerPC architecture. The superscalar organization includes dynamic localized shutdown of execution units to reduce normal-mode power consumption. Three levels of static low-power operation are software programmable for system power management. The 603 PLL (phase lock loop) is capable of generating an internal processor clock at 1/spl times/, 2/spl times/, 3/spl times/ or 4/spl times/ the system clock speed to allow control of system power while maintaining processor performance. Various design features optimize the 603 for both power and performance, creating an ideal microprocessor solution for portable applications.>

About this research paper

What this paper is about

The PowerPC 603 microprocessor is a low-power implementation of the PowerPC architecture. The superscalar organization includes dynamic localized shutdown of execution units to reduce normal-mode power consumption. Three levels of static low-power operation are software programmable for system power management. The 603 PLL (phase lock loop) is capable of generating an internal processor clock at 1/spl times/, 2/spl times/, 3/spl times/ or 4/spl times/ the system clock speed to allow control of system power while maintaining processor performance. Various design features optimize the 603 for both power and performance, creating an ideal microprocessor solution for portable applications.>

Why it matters

OpenAlex reports 22 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

The PowerPC 603 microprocessor is a low-power implementation of the PowerPC architecture. The superscalar organization includes dynamic localized shutdown of execution units to reduce normal-mode power consumption. Three levels of static low-power operation are software programmable for system power management. The 603 PLL (phase lock loop) is capable of generating an internal processor clock at 1/spl times/, 2/spl times/, 3/spl times/ or 4/spl times/ the system clock speed to allow control of system power while maintaining processor performance. Various design features optimize the 603 for both power and performance, creating an ideal microprocessor solution for portable applications.>

Key concepts: PowerPC, Microprocessor, Embedded system, Computer science, Phase-locked loop, Power (physics), Clock rate, Clock gating

Related papers

Back to paper searchBrowse research topicsOriginal source
The PowerPC 603 microprocessor: a low-power design for portable applications — Research Paper | ScholarLens