Simulation and stability analysis of 6T and 9T SRAM cell in 45 nm era
Shyam Akashe, Nitesh Kumar Tiwari, Rajeev Sharma
Abstract
Shyam Akashe, Nitesh Kumar Tiwari, Rajeev Sharma
Abstract
Advancement of technology greatly affects the leakage current and leakage power of SRAM cell. Leakage current in SRAM cell is dominating factor, which is mainly affects the power consumption. This paper presents the design and evaluation of a new SRAM cell made of nine transistors (9T). The 9T SRAM cell achieves improvements in leakage current, power dissipation performance and read stability compared with 6T SRAM cell for low power operation. This paper compares the performance of two SRAM cell topologies, which includes the conventional 6T cell and 9T cell. In particular the leakage current, leakage power and static noise margin (SNM) of each cell is designed and examined. Compared to a conventional 6T SRAM cell, the proposed 9T SRAM cell reduces the power consumption by 62.45% and enhances the read stability by 43.37%.
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Advancement of technology greatly affects the leakage current and leakage power of SRAM cell. Leakage current in SRAM cell is dominating factor, which is mainly affects the power consumption. This paper presents the design and evaluation of a new SRAM cell made of nine transistors (9T). The 9T SRAM cell achieves improvements in leakage current, power dissipation performance and read stability compared with 6T SRAM cell for low power operation. This paper compares the performance of two SRAM cell topologies, which includes the conventional 6T cell and 9T cell. In particular the leakage current, leakage power and static noise margin (SNM) of each cell is designed and examined. Compared to a conventional 6T SRAM cell, the proposed 9T SRAM cell reduces the power consumption by 62.45% and enhances the read stability by 43.37%.
Key concepts: Static random-access memory, Leakage (economics), Electronic engineering, Leakage power, Transistor, Power consumption, Dissipation, Power (physics)